Lisbon, Portugal (in-person event) • August 3–5, 2026
Resilience of the Internet of Things, industrial control systems, critical infrastructures and health care etc. is of utmost importance. The basis to achieve this are trustworthy embedded devices. In order to ensure trustworthiness of these devices their whole life cycle needs to be taken into account. This means their design, production, deployment and use. Here considering hardware and embedded software such as operating systems and firmware. Computing hardware has become an attractive attack surface, either due to unintentional design flaws or malicious design modifications. Hardware designers and automation tool developers alike are challenged to understand the different hardware security threats in order to incorporate effective countermeasures into robust hardware design, verification, and testing. This holds true not only for security-related hardware components but also for general-purpose processors. The most common targets in such adversary attacks are secure architectures, cryptographic primitives, and intellectual property (IP) by counterfeiting. Well-known hardware security threats are e.g. Hardware Trojans (HT), Reverse Engineering (RE), covert and side channels. In addition continuously advancing, novel attacks targeting remote, cross-layer liabilities also become prevalent. In order to ensure trustworthiness of embedded systems also the embedded GPUs need to support secure processing by e.g. providing means to ensure control flow integrity. In addition, operating systems and firmware need to be hardened to reduce vulnerabilities related to known attack types such as buffer overflows and return-oriented-programming, return-to-libc etc. But also AI based attack detection means, implemented in hard- or software, are required to detect novel, innovative attacks during the normal operation of the devices.
Prospective authors are encouraged to submit previously unpublished contributions from a broad range of topics, which include but are not limited to the following:
› Architectures and applications: 5G/6G, healthcare, IoT, etc.
› Networks, protocols and communications: hardware integrations
› Attacks: implementations and countermeasures
› Constrained and trusted environments
› Cryptanalysis/Side channel attacks
› Cryptographic primitives and lightweight cryptography
› Hardware obfuscation
› Hardware crypto-processors, system-on-chip (SoC) and reconfigurable designs
› Trust and anti-counterfeiting
› Reverse engineering, Hardware Trojans detection and countermeasures
› Attack detection: Control flow integrity, AI based attack detection etc.
› Secure, trustworthy operating systems and firmware
Paper submission deadline: April 13, 2026
Authors’ notification: May 4, 2026
Camera-ready submission: May 25, 2026
Registration deadline (authors): May 25, 2026
Workshop dates: August 3–5, 2026
Submitted manuscripts should not exceed 6 pages (plus 2 extra pages, being subject to overlength page charges) and should be of sufficient detail to be evaluated by expert reviewers in the field. The workshop’s proceedings will be published by IEEE and will be included in IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements.
The guidelines for authors, manuscript preparation guidelines, and policies of the IEEE CSR conference are applicable to HACS workshop. Please visit the authors’ instructions page for more details. When submitting your manuscript via the conference management system, please make sure that the workshop’s track 2T10 HACS is selected in the Topic Areas drop down list.
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nsklavos@ieee.org
peter.langendoerfer@b-tu.de
mooney@ece.gatech.edu
Ricardo Chaves, INESC-ID/IST/ULisboa (PT)
Pascal Cotret, Lab-STICC(FR)
Basel Halak, University of Southampton (UK)
Elif Bilge Kavun, University of Passau (DE)
Mahreen Khan, Telecom Paris (FR)
Dominik Klein, Federal Office for Information Security (DE)
Paris Kitsos, University of Peloponnese (GR)
Nicholas Kolokotronis, University of Peloponnese (GR)
Ulrich Kuhne, Telecom Paris/ Institut polytechnique de Paris (FR)
Francesco Leporati, University of Pavia (IT)
Valeria Loscri, Inria-Lille, Nord Europe (FR)
Maria Mushtaq, Telecom Paris (FR)
Admantini Peratikou, Open University of Cyprus (CY)
Francesco Regazzoni, University of Amsterdam/Università della Svizzera italiana (CH)
Vincent Rijmen, KU Leuven/University of Bergen (BE)
Erkay Savas, Sabanci University (TR)
Gurjot Singh, Linkoping University (SE)
Eliana Stavrou, Open University of Cyprus (CY)
Leonel Sousa, INESC-ID, Instituto Superior Técnico, Universidade de Lisboa (PT)
Mark Zwolinski, University of Southampton (UK)
Evangelia Konstantopoulou, University of Patras (GR)
Will be made available in the coming months.
See also the accepted papers of the conference.
Will be made available in the coming months.
See also the detailed program of the conference.